Mobile DDR SDRAMs are CMOS based double data rate synchronous DRAM. These devices are designed for low-power systems. Mobile DDR SDRAMs are high-speed dynamic random-access memory that use 2n-prefetch architecture with an interface designed to transfer two data words per clock cycle.

For reducing refresh power consumption, these devices support the following special power saving modes: PASR (Partial Array Self Refresh), Auto TCSR (Temperature Compensated Self Refresh) and Deep Power Down Mode.