Burst A/D Mux PSRAMs utilize multiplexed address and data bus scheme to minimize external pin counts. These devices include industry standard burst mode to increase read and write bandwidth. The core of these devices contains the integrated memory called Pseudo Static Random Access Memory which is based on self-refresh DRAM design for low power portable applications.

Burst A/D Mux PSRAMs include several power saving modes, such as reduced array refresh mode where data is retained in a portion of the array, and temperature controlled refresh mode. These modes are designed to reduce both standby and active currents. Burst A/D Mux PSRAMs can be operated in standard asynchronous mode and high performance burst mode.